1. Field of the Invention
The present invention relates to a reset signal filter, and more particularly, to a reset signal filter for stabilizing a reset signal generated by a Schmitt trigger buffer or the external reset circuit.
2. Description of the Prior Art
Generally speaking, the reset signal is usually generated according to a delay signal generated by a circuit including resistors and capacitors inside or outside an IC chip, and a Schmitt trigger buffer of the IC chip can generate the reset signal according to the delay signal. However, instability of the external power or noise of the circuit may cause the IC chip switching to the reset state unexpectedly.
Please refer to FIG. 1. FIG. 1 is a schematic diagram of a reset circuit according to the prior art. The external reset circuit of an IC chip includes resistors and capacitors connected in series. The external reset circuit can be divided into two types. Part (A) is a low active reset circuit including a resistor RA coupled to a power end VDDIO and a pin of an IC chip, and a capacitor CA coupled to a ground end GND and the pin of the IC chip. Part (B) is a high active reset circuit including a resistor RB coupled to a ground end GND and a pin of an IC chip, and a capacitor CB coupled to a power end VDDIO and the pin of the IC chip. The reset circuit according to the prior art uses a Schmitt trigger buffer 12 in the IC to generate a reset signal. The Schmitt trigger buffer 12 has two threshold voltages V+ and V−. The values of the threshold voltages V+ and V− are varied according to the design of the Schmitt trigger buffer 12. The input voltages VA and VB of the IC chip are generated by the external reset circuit of the IC chip. The Schmitt trigger buffer 12 outputs a low active or high active reset signal as logic “1” when the input voltages VA or VB of the IC chip is greater than the threshold voltage V+. On the contrary, the Schmitt trigger buffer 12 outputs a low active or high active reset signal as logic “0” when the input voltages VA or VB of the IC chip are smaller than the threshold voltage V−.
Please refer to FIG. 2. FIG. 2 is a waveform diagram of the reset circuit in FIG. 1. Part (A) is signal waveform of the low active reset circuit. Part (B) is signal waveform of the high active reset circuit. From the waveform of the input signals VA and VB, the Schmitt trigger buffer 12 filters out the small noise caused by the external power or the external circuit of the IC chip. The noise is in the range of VDDIO and V−. However, when the noise is great or the external power is unstable, the Schmitt trigger buffer 12 cannot filter the noise out. Thus, when the noise oscillates in the range of the voltage lower than V− or higher than V+, the IC chip will be switched to the reset state randomly.